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? 2015 microchip technology inc. ds20005411a-page 1 emc1001 features ? self-contained internal temperature sensor - +0.25c resolution - 1.5c accuracy +40c to +85c ? smbus address selected by external resistor: - select 1 of 4 per package, 8 addresses available ? maskable interrupt using alert pin ? one-shot command during standby ? low power, 3.0v to 3.6v supply ? 47 a at 0.0625 conversions per second (typical) ? 4.8 a in standby (typical) ? smbus 2.0 compliant interface ? programmable temperature conversion rate ? small 6-lead tsot package applications ? desktop and notebook computers ?thermostats ? smart batteries ? industrial/automotive ? other electronic systems general description the emc1001 is a tiny smbus temperature sensor with 1.5c accuracy and two interrupts. packaged in a sot23-6, the emc1001 provides an accurate, low-cost, low-current solution for critical temperature monitoring in a pc or in embedded applications. the emc1001 generates two separate interrupts with programmable thermal trip points. the therm output operates as a thermostat with programmable threshold and hysteresis. the alert output can be configured as a maskable smbus alert with programmable win- dow comparator limits, or as a second therm output. an efficient fan control system can be created since this output may be used to control a fan. a power-down mode extends battery life in portable applications. each part number may be configured to respond to one of four separate smbus addresses. package types 4 1 2 3 6 smdata smclk addr/therm gnd v dd 5 alert /therm2 emc1001 6-lead tsot 1.5c smbus temperature sensor in miniature tsot
emc1001 ds20005411a-page 2 ? 2015 microchip technology inc. simplified block diagram emc1001 internal temp diode switching current smclk digital mux limit comparator high limit registers therm hysteresis register low limit registers therm limit register address pointer register conversion rate register interrupt masking status register configuration register smbus interface temperature register alert smdata 10-bit delta-sigma adc therm
? 2015 microchip technology inc. ds20005411a-page 3 emc1001 1.0 electrical characteristics absolute maximum ratings? supply voltage vdd..............................................-0.3 to 5.0v voltage on alert/therm2, smdata and smclk pins ...... ..............................................................................-0.3 to 5.5v voltage on any other pin ..............................-0.3 to v dd +0.3v lead temperature range ....................................................... .......................................... refer to jedec spec. j-std-020 esd rating, all pins (human body model) ..................2000v ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. exposure to maximum rating conditions for extended periods may affect device reliability. electrical specifications electrical characteristics: unless otherwise noted, v dd = 3.0v to 3.6v, t a = -25c to +125c, typical values at t a = +27c. parameter symbol min. typ. max. units conditions dc power supply voltage v dd 3.0 3.3 3.6 v average operating current i dd ? 36 ? ma 0.0625 conversion/s, see tab l e 4 - 4 i pd ? 4.8 10 a standby mode temperature measurement accuracy ? 0.5 1.5 c +40c ? t a ?? 85c ?13c-25c ? t a ?? 125c resolution ? 0.25 ? c conversion time ? 26 ? ms voltage tolerance voltage at pin (addr/therm ) v tol -0.3 ? 3.6 v voltage at pin (alert /therm2 , smdata,smclk) v tol -0.3 ? 5.5 v digital outputs (addr/therm, alert/therm2) output low voltage v ol ??0.4vi out =-4ma high level leakage current i oh ?0.11mav out =v dd smbus interface (smdata,smclk) input high level v ih 2.0 ? ? v input low level v il ?0.8v input high/low current i ih /i il -1 ? 1 ma hysteresis ? 500 ? mv input capacitance ? 5 ? pf output low sink current 6 ? ma smdata = 0.6v smbus timing clock frequency f smb 10 ? 400 khz spike suppression ? ? 50 ns bus free time start to stop t buf 1.3 ? ? s hold time start thd:sta 0.6 ? ? s note 1: 300 ns rise time maximum is required for 400 khz bus operation. for lower clock frequencies, the maximum rise time is (0.1/f smb ) + 50 ns.
emc1001 ds20005411a-page 4 ? 2015 microchip technology inc. setup time start tsu:sta 0.6 ? ? s setup time stop tsu:sto 0.6 ? ? s data hold time thd:dat 0.3 ? ? s data setup time tsu:dat 100 ? ? ns clock low period t low 1.3 ? ? s clock high period t high 0.6 ? ? s clock/data fall time t f 20 + 0.1c b ? 300 ns clock/data rise time t r 20 + 0.1c b ?300 ( 1 ) ns capacitive load (each bus line) cb 0.6 ? 400 pf table 1-1: smbus address co nfiguration in formation part number addr/therm pull-up resistor smbus address package description emc1001 7.5 k ? 5% ( note 1 , note 2 ) 100 1000b 6-lead tsot 12 k ? 5% ( note 2 ) 100 1001b 6-lead tsot 20 k ? 5% ( note 2 ) 011 1000b 6-lead tsot 33 k ? 5% ( note 2 ) 011 1001b 6-lead tsot emc1001-1 7.5 k ? 5% ( note 1 , note 2 ) 100 1010b 6-lead tsot 12 k ? 5% ( note 2 ) 100 1011b 6-lead tsot 20 k ? 5% ( note 2 ) 011 1010b 6-lead tsot 33 k ? 5% ( note 2 ) 011 1011b 6-lead tsot note 1: this value must be greater than 1 k ? ? 5% and less than or equal to 7.5 k ??? 5% ? 2: the pull-up resistor must be connected to v dd (pin 1), and the total capacitance on this pin must be less than 100 pf. electrical specifications (continued) electrical characteristics: unless otherwise noted, v dd = 3.0v to 3.6v, t a = -25c to +125c, typical values at t a = +27c. parameter symbol min. typ. max. units conditions note 1: 300 ns rise time maximum is required for 400 khz bus operation. for lower clock frequencies, the maximum rise time is (0.1/f smb ) + 50 ns. temperature specifications electrical characteristics: unless otherwise noted, v dd = 3.0v to 3.6v, t a = -25c to +125c, typical values at t a = +27c. parameters sym. min. typ. max. units conditions temperature ranges operating ambient temperature range t a -25 ? +125 c storage temperature range t a -55 ? +150 c maximum junction temperature t j -40 ? +150 c package thermal resistances thermal resistance, 6l-tsot ? ja ?112 ?c/w
? 2015 microchip technology inc. ds20005411a-page 5 emc1001 2.0 pin description the descriptions of the pins are listed in tab l e 2 - 1 . table 2-1: pin function table tsot pin number description 1 addr/therm logic output pin that can be used to turn on/off a fan or throttle a cpu clock in the event of an overtemperature condition. this is an open-drain output. this pin is sampled following power-up and the value of the pull-up resistor determines the smbus slave address (see table 1-1 ). total capacitance on this pin must not exceed 100 pf, and the pull-up resistor must be connected to the same supply voltage as v dd . 2 gnd ground pin 3v dd supply voltage pin, 3.0v to 3.6v 4 smclk smbus clock input pin 5alert /therm2 logic output pin used as interrupt, smbus alert or as a second therm output. this is an open-drain output. 6 smdata smbus data input/output pin, open-drain output
emc1001 ds20005411a-page 6 ? 2015 microchip technology inc. 3.0 system management bus interface protocol a host controller, such as an i/o controller, communicates with the emc1001 via the two-wire serial interface named smbus. the smbus interface is used to read and write registers in the emc1001, which is a slave-only device. a detailed timing diagram is shown in figure 3-1 . figure 3-1: system management bus timing diagram. the emc1001 implements a subset of the smbus specification and supports write byte, read byte, send byte, receive byte and alert response address protocols, as shown in the following sections. all protocols in these sections use the convention in table 3-1 . 3.1 smbus write byte the write byte is used to write one byte of data to a specific register as shown in tab l e 3 - 2 . 3.2 smbus read byte the read byte protocol is used to read one byte of data from the registers as shown in ta b l e 3 - 3 . smdata smclk t buf p s s - start condition p - stop condition p s t high t low t hd:sta t su:sto t hd:sta t hd:dat t su:dat t su:sta t fall t rise table 3-1: protocol format data sent to device data sent to the host data sent data sent table 3-2: write byte protocol start slave address wr ack command ack data ack stop 171181811 table 3-3: read byte protocol start slave address wr ack command ack start slave address rd ack data nack stop 1711811711811
? 2015 microchip technology inc. ds20005411a-page 7 emc1001 3.3 smbus send byte the send byte protocol is used to set the internal address register to the correct address. the send byte can be followed by the receive byte protocol ( section 3.4 ?smbus receive byte? ) in order to read data from the register. the send byte protocol cannot be used to write data; if data is to be written to a regis- ter, then the write byte protocol must be used (see section 3.1 ?smbus write byte? ). the send byte protocol is shown in tab l e 3 - 4 . 3.4 smbus receive byte the receive byte protocol is used to read data from a register when the internal register address pointer is known to be at the right location (e.g., set via send byte). this is used for consecutive reads of the same register as shown in ta b l e 3 - 5 . 3.5 alert response address the alert /therm2 output can be used as an smbalert# as described in section 4.3 ?alert/therm2 output? the alert response address is polled by the host whenever it detects an smbalert#, i.e. when the alert /therm2 pin is asserted. the emc1001 will acknowledge the alert response address and respond with its device address as shown in tab l e 3 - 6 . 3.6 smbus addresses the emc1001 is available in two versions (emc1001 and emc1001-1), each of which has four 7-bit slave addresses that are enabled based on the pull-up resis- tor on the addr/therm pin. the value of this pull-up resistor determines the slave address per table 1-1 . attempting to communicate with the emc1001 smbus interface with an invalid slave address or invalid proto- col results in no response from the device and does not affect its register contents. the emc1001 supports stretching of the smclk signal by other devices on the smbus but will not perform this operation itself. the emc1001 has an smbus timeout feature. bit 7 of the smbus timeout enable register enables this function when set to 1 (the default setting is 0 ). when this feature is enabled, the smbus will timeout after approximately 25 ms of inactivity. table 3-4: send byte protocol start slave address wr ack register address ack stop 1711811 table 3-5: receive byte protocol start slave address rd ack register data nack stop 1711811 table 3-6: modified smbus receive byte protocol response to ara start alert response address rd ack emc1001 slave address nack stop 1711811
emc1001 ds20005411a-page 8 ? 2015 microchip technology inc. 4.0 product description the emc1001 is an smbus temperature sensor that monitors a single temperature zone. thermal manage- ment is performed in cooperation with a host device. the host reads the temperature data from the emc1001 and takes appropriate action such as con- trolling fan speed or processor clock frequency. the emc1001 has programmable temperature-limit regis- ters that define a safe operating window. after the host has configured the temperature limits, the emc1001 can operate as a free-running independent watchdog to warn the host of temperature hot-spots, without requiring the host to poll the device. the addr/therm output can be used to control a fan without host intervention. figure 4-1: controlling a fan without host intervention. the emc1001 has two basic modes of operation: ? run mode: in this mode, the emc1001 continuously converts temperature data and updates its registers. the rate of temperature conversion is configured as shown in section 4.9 ?conversion rate register? . ? standby mode: in this mode, the emc1001 is placed in standby to conserve power, as described in section 4.5 ?standby mode? . addr/therm alert/therm2 emc1001 host fan driver smdata internal diode smclk smbus interface
? 2015 microchip technology inc. ds20005411a-page 9 emc1001 4.1 temperature monitors thermal diode temperature measurements are based on the change in forward bias voltage ( ? v be ) of a diode when operated at two different currents: equation 4-1: the change in ? v be voltage is proportional to absolute temperature t. figure 4-2 shows a detailed block diagram of the temperature measurement circuit. the emc1001 incorporates switched capacitor technology that integrates the temperature diode ? v be from different bias currents. the negative terminal (dn) for the temperature diode is internally biased with a forward diode voltage referenced to ground. the advantages of this architecture over nyquist rate direct-conversion adc (flash) or successive approx- imation register (sar) converters are superb linearity and inherent noise immunity. the linearity can be directly attributed to the delta-sigma adc single-bit comparator, while the noise immunity is achieved by the ~20 ms integration time which translates to 50 hz input noise bandwidth. figure 4-2: detailed block diagram. 4.2 temperature measurement results and data the 10-bit temperature measurement results are stored in temperature value registers. tab le 4 - 1 shows the two?s complement temperature data format with an lsb equivalent to 0.25c. ? v be v be_high v be_low ? kt q --------- - i high i low -------------- ?? ?? ln = ? = where: k = boltzmann?s constant t = absolute temperature in kelvin q = electron charge ? = diode ideality factor delta v be sample & hold i bias i low i high 1-bit delta-sigma modulator digital averaging filter v dd internal or remote diode bias diode 10-bit output table 4-1: temperature data format temperature valid range - 40c to +125c two?s complement -0.25c 1111 1111 11 ( 1 ) 0.0c 0000 0000 00 note 1: temperature measurement returns 1100 0000 00 for all temperatures ? -64.00c. 2: temperature measurement returns 0111 1111 11 for all temperatures ? +127.75c. +0.25c 0000 0000 01 +0.50c 0000 0000 10 +0.75c 0000 0000 11 +1c 0000 0001 00 ... ... +125c 0111 1101 00 ( 2 ) table 4-1: temperature data format (continued) temperature valid range - 40c to +125c two?s complement note 1: temperature measurement returns 1100 0000 00 for all temperatures ? -64.00c. 2: temperature measurement returns 0111 1111 11 for all temperatures ? +127.75c.
emc1001 ds20005411a-page 10 ? 2015 microchip technology inc. the eight most significant bits are stored in the temperature value high byte register and the two least significant bits stored in the temperature value low byte register as outlined in ta b l e 4 - 2 . the six lsb positions of the temperature value low byte register always read zero. in tab l e 4 - 2 , the upper case ?b? shows the bit position of a 16-bit word created by concatenating the high byte and low byte, and the lower case ?b? shows the bit position in the 10-bit value. 4.3 alert /therm2 output the alert /therm2 output asserts if an out-of-limit measurement is detected (t a ? low limit or t a > high limit). the alert /therm2 pin is an open-drain output and requires a pull-up resistor to v dd . the alert /therm2 pin can be used as an smbalert#, or may be configured as a second therm output. as described in the smbus specification, an smbus slave may inform the smbus master that it wants to talk by asserting the smbalert# signal. one or more alert outputs can be hardwired together as a wired-or bus to a common input. the alert /therm2 pin resets when the emc1001 responds to an alert response address (ara = 0001 100 ) sent by the host, and if the out-of- limit condition no longer exists, but it does not reset if the error condition remains. the alert /therm2 pin can be masked so that it will not assert in the event of an out-of-limit temperature measurement, except when it is configured as a second therm pin. figure 4-3: alert response to temperature limits exceeded. the alert /therm2 pin can be configured as a sec- ond therm pin that asserts when the temperature measurement exceeds the temperature high limit value. the output will not de-assert until the tempera- ture drops below the temperature high limit, minus the therm hysteresis value. table 4-2: bit position of two byte values high byte low byte b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 0 0 0 temp time temperature high limit temperature low limit alert/therm2 logic high logic level smbus ara
? 2015 microchip technology inc. ds20005411a-page 11 emc1001 4.4 addr/therm output the addr/therm output asserts if the temperature measurement exceeds the programmable therm limit. it can be used to drive a fan or other failsafe devices. the addr/therm pin is open drain and requires a pull-up resistor to v dd . the value of this pull-up resistor determines the slave address per table 1-1 . the addr/therm pin cannot be masked. when the addr/therm pin is asserted, it will not de-assert until the temperature drops below the therm limit, minus the therm hysteresis value. figure 4-4: therm response to therm limit exceeded. 4.5 standby mode the emc1001 can be set to standby mode (low power) by setting a bit in the configuration register as described in section 4.8 ?configuration register? . this shuts down all internal analog functions while the smbus remains enabled. when the emc1001 is in standby mode, a one-shot command measurement can be initiated. the user may also write new values to the limit registers described in section 4.10 ?limit registers? while in standby. if the previously stored temperature is outside any of the new limits, the alert /therm2 output will respond as described in section 4.3 ?alert/therm2 output? and the addr/therm output will respond as described in section 4.4 ?addr/therm output? . temp time therm limit therm limit - therm hysterisis therm therm hysteresis logic high logic level
emc1001 ds20005411a-page 12 ? 2015 microchip technology inc. 4.6 register allocation the registers shown in ta b l e 4 - 3 are accessible through the smbus. at device power-up, the default values are stored in all registers. a power-on reset (por) is initiated when power is first applied to the part and the v dd supply exceeds the por threshold. reads of undefined regis- ters will return 00h, and writes to undefined registers will be ignored. the emc1001 uses an interlock mechanism that locks the low-byte value when the high byte register is read. this prevents updates to the low byte register between high-byte and low-byte reads. this interlock mecha- nism requires that the high byte register always be read prior to reading the low byte register. table 4-3: register map register address (hex) read/write register name power-on default 00 r temperature value high byte 0000 0000 01 rc status undefined 02 r temperature value low byte 0000 0000 03 r/w configuration 0000 0000 04 r/w conversion rate 0000 0100 05 r/w temperature high limit high byte 0101 0101 (+85c) 06 r/w temperature high limit low byte 0000 0000 07 r/w temperature low limit high byte 0000 0000 (0c) 08 r/w temperature low limit low byte 0000 0000 0f w one-shot n/a 20 r/w therm limit 0101 0101 (+85c) 21 r/w therm hysteresis 0000 1010 (+10c) 22 r/w smbus timeout enable 1000 0000 fd r product id register 0000 0000 ( emc1001 ) 0000 0001 ( emc1001-1 ) fe r manufacture id 0101 1101 ff r revision number 0000 0011 ( note 1 ) note 1: the revision number may change. please obtain the latest version of this document from the microchip web site ( www.microchip.com ).
? 2015 microchip technology inc. ds20005411a-page 13 emc1001 4.7 status register the status register is a read-only register that stores the operational status of the part. when either t low or t high are set (t a ? low limit or t a > high limit) and the alert /therm2 pin is not masked, the alert /therm2 pin will assert. see section 4.3 ?alert/therm2 output? for more details on the alert function. each bit is cleared individually when the status register is read, provided that the error condition for that bit no longer exists. the alert /therm2 output is latched and will not be reset until the host has responded with an alert response address (ara = 0001 100 ). the alert /therm2 output will not reset if the status register has not been cleared. register 4-1: status register rc-0 rc-0 rc-0 u-0 u-0 u-0 u-0 rc-0 busy thigh tlow ? ? ? ? thrm bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown rc = read then clear bit 7 busy: adc is busy converting a value 1 = adc is converting 0 = adc is not converting bit 6 thigh: temperature high limit bit 1 = temperature high limit is exceeded 0 = temperature high limit is within the limits bit 5 tlow: temperature low limit bit 1 = temperature low limit is exceeded 0 = temperature low limit is within the limits bit 3-1 reserved: unimplemented bit, read as ?0?. bit 0 thrm: therm limit bit 1 = therm limit is exceeded, addr/therm output will be asserted 0 = therm limit is in the limits
emc1001 ds20005411a-page 14 ? 2015 microchip technology inc. 4.8 configuration register the configuration register controls the functionality of the temperature measurements. register 4-2: conf iguration register r/w-0 r/w-0 r/w-0 u-0 u-0 u-0 u-0 u-0 mask1 run/stop alert/therm2 ? ? ? ? ? bit 7 bit 0 legend: r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por ?1? = bit is set ?0? = bit is cleared x = bit is unknown bit 7 mask1: masks the alert /therm2 signal ( note 1 ). 1 =alert is disabled; any out-of-limit condition will not assert the signaled pin 0 =alert is enabled; any out-of-limit condition will assert the signaled pin ( default ) bit 6 run/stop: initiates adc conversions 1 = standby mode, thus reducing supply current significantly, though the smbus will still be active ( note 2 ) 0 = active mode (continuously running); the adc will convert temperatures in a continuous mode ( default ) bit 5 alert/therm2: sets the alert /therm2 pin to act as either an smbalert# signal or as the therm2 signal. 1 = the alert /therm2 pin acts as the therm2 signal and bit 7 is ignored 0 = the alert /therm2 pin acts as the alert (smbalert#) signal ( default ) bit 3-0 reserved: unimplemented bit, read as ?0?. note 1: this bit is ignored if the alert /therm2 pin is configured as therm2 signal by bit 5. 2: if this bit is high and the one-shot register is written to, the adc will execute a temperature measurement and then return to standby mode.
? 2015 microchip technology inc. ds20005411a-page 15 emc1001 4.9 conversion rate register the conversion rate register determines how many times the temperature value will be updated per sec- ond. the lowest 4 bits configure a programmable delay that waits between consecutive conversion cycles to obtain the desired conversion rate. ta b l e 4 - 4 shows the conversion rate and the associated quiescent current. 4.10 limit registers the user can configure high and low temperature limits and an independent therm limit. the temperature high limit (t h ) is a 10-bit value that is set by the temperature high limit high byte register and the temperature high limit low byte register. the temperature high limit low byte register contains the two least significant bits, as shown in tab l e 4 - 2 . the two least significant bits are stored in the upper two bits of the register, and the six lsb positions of this register always read zero. the temperature low limit (t l ) is a 10-bit value that is set by the temperature low limit high byte register and the temperature low limit low byte register, as shown in tab l e 4 - 2 . the limits are compared to the temperature measure- ment results (t int ) and have been exceeded if (t int ? t l or t int >t h ). if either limit is exceeded then the appropriate bit is set high in the status register and the alert /therm2 output will respond as described in section 4.3 ?alert/therm2 output? . the therm limit (t th ) is a single byte value set by the therm limit register. exceeding the therm limit asserts the addr/therm signal as described in section 4.4 ?addr/therm output? . when the alert /therm2 pin is configured as therm2 , then exceeding the high limit asserts this pin. 4.11 therm hysteresis register the therm hysteresis register holds a hysteresis value that determines the de-assertion of therm , as shown in figure 4-4 . it defaults to 10c and can be set by the user at any time after power-up. when the alert /therm2 pin is configured as therm2 , the hysteresis value also impacts the de-assertion of therm2 . 4.12 one-shot register writing to the one-shot register while in standby mode initiates a conversion and comparison cycle. the emc1001 will execute a temperature measurement, compare the data to the limit registers and return to the standby mode. a write to the one-shot register will be ignored if it occurs while the emc1001 is in run mode. 4.13 smbus timeout enable the emc1001 has an smbus timeout feature. bit 7 of the smbus timeout enable register enables this func- tion when set to 1 (the default setting is 0 ). when this feature is enabled, the smbus will timeout after approx- imately 25 ms of inactivity. table 4-4: conversion rates conversion rate value conversions/ second typical quiescent current (a) 00h 0.0625 36 01h 0.125 37 02h 0.25 38 03h 0.5 40 04h ( default )1 44 05h 2 54 06h 4 71 07h 8 109 08h 16 182 09h 32 326 0ah to ffh reserved ?
emc1001 ds20005411a-page 16 ? 2015 microchip technology inc. 5.0 packaging information 5.1 package marking information 6-lead tsot example legend: x device version nnnnnnn last 7 digits of lot number r revision country of origin pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 101 ^^ 3 e top marking bottom marking 1517 xxx yyww 3 e
? 2015 microchip technology inc. ds20005411a-page 17 emc1001
emc1001 ds20005411a-page 18 ? 2015 microchip technology inc.
? 2015 microchip technology inc. ds20005411a-page 19 emc1001 appendix a: revision history revision a (may 2015) ? original release of this document.
emc1001 ds20005411a-page 20 ? 2015 microchip technology inc. notes:
? 2015 microchip technology inc. ds20005411a-page 21 emc1001 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . part no. -x package device device: emc1001: tiny smbus temperature sensor emc1001-1: tiny smbus temperature sensor with alternate smbus address (see ta b l e 1 - 1 ) package: afzq= 6-pin, thin small outline transistor package, green, lead free tape and reel option: blank = standard packaging (tube or tray) tr = tape and reel (1) examples: a) EMC1001-AFZQ-TR: 6-pin tsot package, tape and reel b) emc1001-1-afzq-tr: alternate smbus address, 6-pin tsot package, tape and reel note 1: tape and reel identifier only appears in the catalog part number description. this identifier is used for ordering purposes and is not printed on the device package. check with your microchip sales office for package availability with the tape and reel option. [ - x] (1) tape and reel option
emc1001 ds20005411a-page 22 ? 2015 microchip technology inc. notes:
? 2015 microchip technology inc. ds20005411a-page 23 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, flexpwr, jukeblox, k ee l oq , k ee l oq logo, kleer, lancheck, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic 32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip tec hnology incorporated in the u.s.a. and other countries. the embedded control solutions company and mtouch are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, ecan, in-circuit serial programming, icsp, inter-chip connectivity, kleernet, kleernet logo, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, righttouch logo, real ice, sqi, serial quad i/o, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered trademar ks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2015, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-63277-385-2 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 ==
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